Surrogate Model Based Processor Architectural Design Space Exploration Algorithm

doi:10.16182/j.issn1004731x.joss.201705020

Journal of System Simulation ›› 2017, Vol. 29 ›› Issue (5): 1077-1085.doi: 10.16182/j.issn1004731x.joss.201705020

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Surrogate Model Based Processor Architectural Design Space Exploration Algorithm

Wang Hongwei^1,2,3, Zhu Ziyuan^1,2, Shi Jinglin^1,2, Su Yongtao^1,2, Shi Hongmei^1,2,3, Liu Zhiguo^1,2,3

1. Beijing Key Laboratory of Mobile Computing and Pervasive Device, Beijing 100190, China;
2. Institute of Computing Technology,Chinese Academy of Sciences, Beijing 100190, China;
3. University of Chinese Academy of Sciences, Beijing 100190, China

Received:2015-07-03 Revised:2015-09-14 Online:2017-05-08 Published:2020-06-03

Abstract

Abstract: A novel surrogate model based penalty-distance multi-objective expected improvement (PDMOEI) algorithm was proposed for processor architectural design space exploration (DSE): first using a Kriging interpolation technique to construct a surrogate model, then adopting the surrogate model based PDMOEI algorithm to search the Pareto points and finding the globally multi-objective optimized architectural parameter configurations. The proposed algorithm was compared with the multi-objective expected improvement (MOEI) algorithm, the non-dominated sorting genetic algorithm II (NSGA-II) algorithm and the metamodel-assisted NSGA-II (MA-NSGA-II) algorithm by performing two experiments. Experimental results show that, the proposed algorithm achieves better Pareto points pursuing performance than the other algorithms in both the closeness of the obtained approximating Pareto points to the actual Pareto points and the coverage of the actual Pareto points.

Key words: design space exploration, surrogate model, Kriging interpolation, multi-objective expected improvement

CLC Number:

TP391.9

Wang Hongwei, Zhu Ziyuan, Shi Jinglin, Su Yongtao, Shi Hongmei, Liu Zhiguo. Surrogate Model Based Processor Architectural Design Space Exploration Algorithm[J]. Journal of System Simulation, 2017, 29(5): 1077-1085.

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Surrogate Model Based Processor Architectural Design Space Exploration Algorithm

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