Embedded Real Time Network Multimedia Data Transmission Method

doi:10.16182/j.issn1004731x.joss.201704014

Abstract

Abstract: To improve the speed of data acquisition and real-time video transmission, Filed Programmable Gate Array (FPGA) as the core processor, the Verilog HDL was used to describe the circuit function realization to realize the high-speed access of Synchronous Dynamic Random Access Memory (SDRAM) based on a typical network real-time transmission network multimedia service data. The new high-speed real-time transmission of video data took full advantage of the characteristics of FPGA parallel processing to improve video data acquisition and transmission rates. The experimental results demonstrate the effectiveness of the method.

Key words: high speed real time transmission, FPGA, SDRAM, verilog HDL

CLC Number:

TN919.85

Wang Zaijian, Wan Ting, Wu Dandan, Xing Qingqing. Embedded Real Time Network Multimedia Data Transmission Method[J]. Journal of System Simulation, 2017, 29(4): 808-817.

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