基于SoC-FPGA集群的CXL-以太网异构互连仿真平台

doi:10.16182/j.issn1004731x.joss.25-0847

摘要/Abstract

摘要：

为解决现有CXL仿真平台在模拟大规模、CXL-以太网异构互连的数据中心场景时，难以兼顾仿真速度与拓扑灵活性的问题，提出了一种基于SoC-FPGA集群的半实物仿真平台CNetSim。采用SoC-FPGA硬件仿真终端节点，利用其真实的处理器与内存设备及FPGA实现CXL.mem协议，以支持标准Linux系统与真实分布式应用的高速运行；利用软件仿真灵活的拓扑配置能力，在仿真服务器上基于DPDK实现了CXL交换网络与机柜间以太网互连。仿真实验结果表明：相较于传统的软件模拟器，该平台在完整运行分布式应用时实现了至少3个数量级的加速，且能通过配置关键仿真参数精确等比例拟合真实系统的性能特征。

关键词: CXL, 数据中心, 内存语义互连, SoC-FPGA, 半实物仿真

Abstract:

To address the difficulty of balancing simulation speed and topology flexibility when simulating large-scale, CXL-Ethernet heterogeneous interconnect datacenter scenarios with existing CXL simulation platforms, this paper presents CNetSim, a semi-physical simulation platform based on an SoC-FPGA cluster. The platform employs SoC-FPGA hardware to emulate endpoint nodes, leveraging their real processors and memory devices as well as FPGA-implemented CXL. mem protocol to support high-speed execution of standard Linux systems and real distributed applications. Meanwhile, it utilizes the flexible topology configuration capability of software simulation to implement CXL switched networks and inter-rack Ethernet interconnects based on DPDK on simulation servers. Simulation experimental results demonstrate that, compared to traditional software simulators, the platform achieves at least three-orders-of-magnitude speedup when executing complete distributed applications, and accurately fits the performance characteristics of real systems by configuring key simulation parameters.

Key words: CXL, data center, memory semantic interconnect, SoC-FPGA, hardware-in-the-loop simulation

中图分类号:

TP338.4

张旭,刘珂,陈明宇 . 基于SoC-FPGA集群的CXL-以太网异构互连仿真平台[J]. 系统仿真学报, 2026, 38(7): 2037-2052.

Zhang Xu,Liu Ke,Chen Mingyu . Simulation Platform Based on SoC-FPGA Clusters for CXL-ethernet Heterogeneous Interconnection[J]. Journal of System Simulation, 2026, 38(7): 2037-2052.

图/表 13

表1

图1

图2

图3

图4

图5

图6

图7

表2

图8

图9

表3

表4

真实分布式数据密集型应用的执行速度

应用程序	应用通信特征	输入	执行速度	单节点指令数	软件(Gem5)理论仿真速度
Linux启动			77 s		1 813 s
PageRank	带宽敏感型	soc-LiveJournal1	2.8 s	$1.9 × 1010$	$1.9 × 105$ s
ResNet18训练	带宽敏感型	cifar10	295 s/step	$1.4 × 1011$ /step	$1.4 × 106$ s/step
Redis	延迟敏感型	memtier_benchmark	80 kops	$4.3 × 108$ /s	$4.3 × 103$ s

表4

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名称	多种互连结构	运行速度	延迟、带宽参数可配置	支持结构仿真	贴近真实部署场景
NUMA系统	×	√	×	×	×
软件仿真	√	×	√	√	×
FPGA硬件仿真	×	√	×	√	√
CNetSim	√	√	√	√	√

名称	值	比例/%
LUT	59 009	11.3
Register	85 895	8.2
BRAM	581	59.0
URAM	0	0

R值	理论延迟/ns	实际延迟/ns	误差/%
2.7	4 629	4 906	6.0
3.0	4 166	4 424	6.2
4.0	3 125	3 368	7.8
5.0	2 500	2 710	8.4
6.0	2 083	2 285	9.7
6.4	1 953	2 171	11.2